Heterogeneous processor for integrated modular avionics of combat systems

As TAdviser discovered, on October 30, the Ministry of Industry and Trade posted an open tender on the Procurement EIS portal for the implementation of OCD to develop a heterogeneous processor for integrated modular avionics of combat systems (cipher "Processor-IMA-BK")^[1] The initial price of the contract is set at about 5.9 billion rubles. This ROC is provided for by the state program of the Russian Federation "Development of the military-industrial complex."

From the technical assignment for the competition published by the Ministry of Industry and Trade, it follows that the purpose of the work is to develop a multi-core heterogeneous system-on-a-chip SBIS based on a central processor and a neuroprocessor for use in products of integrated modular avionics of combat systems designed for data processing and solving a wide range of control tasks. There are no direct analogues, it is said there.

The microcircuit should include: processor subsystem, memory subsystem, hardware graphics accelerator, hardware video compression unit, neuro-accelerator subsystem, video and graphics interface subsystem, I/O interface subsystem, system controller.

The processor subsystem of the chip must contain four RISC processor cores. The requirements for it specify the architecture of the PowerISA processor core command system version at least v2.05 and/or other architecture - it must be defined and agreed with the head research testing organization for the creation and conduct of research of ECB products, the head research organization in the field of development and application of AI systems in aircraft aircraft equipment complexes and interested consumers.

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Freepik/Pikisuperstar

At the stage of the technical project, the need to include a USB interface controller in the microcircuit and the possibility of using domestic complex functional units in the design of the microcircuit will be assessed.

However, the final composition of the microcircuit can be specified and must be agreed with the head research testing organization for the creation and conduct of studies of ECB products at the stage of technical design development.

The chip needs to develop common software, including a user development environment, a C/C + compiler, a JTAG debugger based on OpenOCD and various drivers. However, the composition of the common software, the development language, as well as the type of OS, for use as part of which the common software of the microcircuit is calculated, are specified at the stage of development of the technical project.

The performance of OCD, including the stage of preliminary testing of prototypes and acceptance, is designed for a period until the end of 2027, follows from the terms of reference.

The basis of the concept of integrated modular avionics of combat systems (IMA BC) is the rejection of the concept of an on-board digital computer as a separate essence of a computing complex towards a set of standardized modules combined into a single redundant network environment^[2] of^[3]

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