Developers: | TSMC |
Date of the premiere of the system: | April 2025 |
Branches: | Electrical and Microelectronics |
Technology: | Processors |
Content |
History
2025: Process Announcement
At the end of April 2025, TSMC introduced the A14 process with 1.4 nm standards. It provides a number of significant advantages over the previous generation N2 (2 nm) production procedure.
The A14 process technology involves the use of second generation Gate-All-Around (GAA) transistors. Compared to N2, a performance increase of 10-15% with comparable power consumption is promised. On the other hand, while maintaining the previous level of performance and logical complexity, a reduction in power consumption by 25-30% can be achieved. The density of logic elements is increased by 23%, the total density of transistors in mixed design - by 20%.
Thus, the transition to the A14 will create more efficient and energy efficient microchips for various applications. One of the key benefits of the A14 family of processes is the NanoFlex Pro architecture, which allows chip developers to fine-tune their configurations to achieve optimal power, performance, and footprint for specific applications or workloads.
However, the standard version of the A14 process technology does not support the Super Power Rail architecture with a backside power supply system (BSPDN). Thus, this technique is focused primarily on those scenarios in which the tangible advantages of using BSPDN are not achieved. The A14 process technology is suitable for client, peripheral and specialized applications that do not require high-density power line wiring, but low power consumption and performance are important. The start of mass production of chips based on A14 is scheduled for 2028, and later a version of the technical process with BSPDN support will appear.[1]