Cadence Allegro PCB Design Solution

Cadence AllegroPCB Design Solution is the scaled, approved development environment of printed circuit boards intended for the solution of modern technology and methodological tasks for reduction and increase in predictability of development cycles.

Description

Allegro PCB Design Solution is delivered in a basic complete set with a set of different options and necessary for creation of layers of printed circuit boards contains all in completely integrated design flow. The Allegro PCBDesigner environment comprises all necessary for design of simple and difficult printed circuit boards

Fig. 1 - The Allegro PCB Designer Environment comprises all necessary for design of simple and difficult printed circuit boards

As a part of a basic complete set of Allegro PCB Designer: the general module, the environment of management of the limiting conditions, the editor of printed circuit boards, the automatic or interactive tracer, means of preserving of data in industrial formats and design-time environment of mechanical components of constructions (CAD).

The editor of printed circuit boards (PCB Editor) represents Wednesday with a full range of means from basic transactions of planning, placement and trace before replication and expanded planning with intermediate elements for simple and difficult constructions of printed circuit boards (fig. 1).

Advantages

• Is the tested, scalable and economic editing tool and traces of printed circuit boards delivered in a basic complete set and with a set of options of expansion of a configuration
• Saves from unnecessary iterations thanks to the design flow performed taking into account the set limiting conditions
• Supports an extensive rule set for a task of the physical sizes, intervals, technology processes, installation and testing (DFx), high-speed connections (HDI) and electric high-speed domains
• Has the general management system for the limiting conditions for creation, control and check of these conditions "from the end by the beginning"
• Allows to interact with packets of other producers that accelerates design process and gives the chance to use the best in area of the integrated development tools

PCB Editor technology

The environment of editing printed circuit boards taking into account the limiting conditions The main Allegro PCB Designer component is the editor of topology of PCBEditor – the intuitive and simple Wednesday in use intended for creation and editing constructions of both simple, and difficult printed circuit boards taking into account the set limiting conditions. The technology of the placement directed by rules of installation of DFA (Design For Assembly) allows to place compactly and unmistakably components

Fig. 2 – The technology of the placement directed by rules of installation of DFA (Design For Assembly) allows to place compactly and unmistakably components

The wide feature set meets the numerous requirements of design and production:

• A powerful set of means of planning and placement, including replication for development process acceleration
• Interactive relocators, compression and editing areas form the high-performance environment of interaction in real time with display of geometric and temporary boundaries
• Means of dynamic change of forms have functions of section and consolidation of copper polygons during iterations of movement and trace
• PCB Editor can also generate a complete set of photo masks, the test output data, including the Gerber 274x, NC drill and tests for check of the printed circuit board without installation in different formats.

Management of the limiting conditions

The management system for the limiting conditions displays in real time the geometrical extent, intervals, high-speed data with the status of compliance for each development stage. Each working spreadsheet provides the interface for creation, management and verification of different rules in a hierarchical order. Using this powerful application, designers can create, edit and browse sets of the limiting conditions in the form of graphic topology which acts as electronic "light copies" at the ideal strategy of implementation. As the limiting conditions are connected with the database, they can direct processes of placement and trace for the set signals.

The management system for the limiting conditions is completely integrated into PCB Editor, an inspection can be carried out in real time in development process. Results of check are displayed graphically: the sections which successfully underwent testing are highlighted green, and the sections which are not corresponding to the limiting conditions - red color. It allows developers to watch directly design process and to see result of any changes of construction.

Planning and placement

The methodology of development of printed circuit boards taking into account the limiting conditions and rules includes a flexible and powerful set of automatic and interactive means of placement. The engineer or the developer can place components or chains in special "rooms" ("rooms") during development or planning. Components can be filtered or selected on special designation, type of the body or a seat, by name (name) of network, the part number or by number of the table or the page of the scheme.

Such control accuracy is necessary in the modern schemes containing thousands of components. The analysis of assemblies in real time and a feedback help to improve this management, to increase performance and efficiency by component placement according to corporate rules or recommendations on the basis of results of electromagnetic modeling.

The dynamic placement directed by rules of installation of elements (DFA, design-for-assembly), allows to carry out an inspection of each body during interactive component placement (fig. 2). The feedback created on the basis of a two-dimensional array of classes and prototypes of the body provides the minimum requirements to admissions. Using the principles "the party to the party", "one after another" developers can place components for achievement of at the same time optimal trace, technological effectiveness and the best properties of signals.

Copying of placements

The excellent technology of copying of placements implemented in Allegro PCB Designer allows users to carry out quickly placement and trace of similar sections of a chain. She allows to create a template of a chain and its trace which can be applied to all similar sections of a chain. The template of placement of a component can also be used in other developments with similar chains. When copying placements there is an opportunity to turn or to specularly reflect the copied object in horizontal direction or verticals. All elements connected with an object, including the hidden blind transitional openings, are displayed in the necessary layers when mirroring an object.

Display and visualization

In all software packages of the editor of PCB Editor printed circuit boards there is built-in means of three-dimensional visualization. The three-dimensional interface supports different options of filtering, simulation of examining by means of the camera, options of the graphics display, such as sploshnost (solid), transparency (transparency) and framework (wireframe) and panoramas managed by means of a mouse, increase and turn of the display. In the three-dimensional mode also display of complex end-to-end structures and the isolated payment sections is supported. By means of a contextual management structure it is possible to open many windows, and three-dimensional images can be copied and saved in the JPEG format (fig. 3).

An opportunity to overturn a payment ("flip") allows to overturn a payment on a y axis, as appropriate inverting the database on borders. This transaction will reorganize construction display in such a way that an upper part of construction appears below, and lower – above. For CAD systems it is very important to have an opportunity to display the bottom view for the engineers who are engaged in laboratory debugging of payments or testing in a production process. An opportunity to overturn a payment is intended not only for its viewing: at the same time it is possible to make changes to its construction. The built-in means of three-dimensional display allows to consider section of a payment or complex transitional structures under different corners, with different increase, with turn or rotation to reduce number of iterations for developers of mechanical structural elements and producers of printed circuit boards and not to allow introduction of errors

Fig. 3 – The built-in means of three-dimensional display allows to consider section of a payment or complex transitional structures under different corners, with different increase, with turn or rotation to reduce number of iterations for developers of mechanical structural elements and producers of printed circuit boards and not to allow introduction of errors

Interactive editing

The trace option for the editor of PCB Editor printed circuit boards contains powerful interactive control facilities of process of automatic routing and increase in its performance. Working with any forms, corners and mutual movements of components, tracers allow users to select different priorities of actions.

During editing the developer can see in real time, what is the time remains for accomplishment of connections with the set tight temporary restrictions. The interactive mode also allows to carry out group trace of many networks and interactive setup of networks of big length and with restrictions on admissible delays.

Trace of buses

The mode of trace of buses (Multi-Line Routing) is intended for trace of a large number of lines on the printed circuit board at once. Together with an option of "capture of a circuit" this utility allows to carry out within read minutes trace of many lines on sections of the construction containing at the same time flexible and tough elements while at trace of separate lines on it hours leave. The option of "capture of a circuit" is responsible for an insert of lines in a flexible part of construction (fig. 4).

Trace of buses with an option of capture of a circuit accelerates process of trace on flexible sections of constructions of printed circuit boards

Fig. 4 – Trace of buses with an option of capture of a circuit accelerates process of trace on flexible sections of constructions of printed circuit boards

Planning and trace

For planning and trace of printed circuit boards with a high density of placement, a large number of restrictions and tire connections considerable time can be required. Process is complicated by miniaturization of modern components, new levels of electric signals and special requirements to topology therefore it is no wonder that traditional CAD technologies and means cannot implement intention of the developer completely. Global Route Environment provides the technology allowing to apprehend intention of the developer and to adhere to it. Thanks to its architecture intended for planning of connections and the procedure of global trace users for the first time can realize the experience and the ideas by means of the tool which perceives them naturally.

Users create abstract data about connections by means of architecture of planning of a route of connections, quickly convert it into the ready-made solution and can check this solution by means of the program of global trace. Use of abstraction of connections allows to reduce a number of elements from tens of thousands to hundreds that leads to significant decrease in volume of direct handwork of the designer.

When using abstract data planning process and traces can be also accelerated by use of space visual display of open area together with data and intention of the developer. Then the program of trace fulfills all parts of connections in connection therewith intention, without resorting to the help of the user who had to control at the same time process of trace earlier and resolve problems of connections. The considerable simplification of development process reached at the same time in comparison with the means applied today allows users to create effective solutions quicker and easier, reducing cycle duration of development and increasing labor productivity (fig. 5).

The technology of planning of connections on a payment of Allegro Interconnect Flow Planner allows users to reduce number of layers and to considerably reduce development cycle duration

Fig. 5 – The technology of planning of connections on a payment of Allegro Interconnect Flow Planner allows users to reduce number of layers and to considerably reduce development cycle duration

Design of high-speed payments

More and more broad application of the latest standard interfaces, such as DDR3, DDR4, PCI Express, USB 3.0 imposes a number of restrictions which should be considered at design of the printed circuit board.

Allegro PCB Designer with the option High-Speed helps to reach easily and quickly compliance to requirements of modern interfaces. This option expands a set of controlled electric restrictions which guarantee that the pc board design will meet specifications of modern interfaces.

Besides, High-Speed allows users to introduce expanded rules of design by use of formulas together with the existing rules or the resulting data, for example, the actual length of conductors.

Acceleration of design of vremyazavisimy chains

Allegro PCB Editor with the option High-Speed considerably accelerates work on high-speed interfaces using the new instrument of automatic fine tuning of length of conductors for time of dependent chains (Auto-interactive Delay Tuning – AiDT). AiDT gives the chance to users quickly to arrange length at the selected set of signals on a payment, for example, of a byte path or completely all interface. This tool considerably reduces development time - from several to several o'clock minutes (Fig. 6).

Fig. 6 – Automatic fine tuning of length of conductors before use of the new Auto-interactive Delay Tuning tool

Support of technology of the return drilling

Allegro PCB Editor with the option High-Speed gives the chance to users to apply technology of the return drilling to transitional openings at the most critical signals on a payment. It allows to reduce a set of parasitic effects, such as reflection. In this case output files, Backdrill NC and the table of drilling, will comprise all information, necessary for the producer, on the corresponding openings with the return drilling.

Design taking into account production technologies

Allegro PCB Editor supports technologies of design taking into account a testoprigodnost (DfT), with accounting of a possibility of production (DfF) and taking into account technological effectiveness of assembly (DfA). All these major restrictions are checked at a topology development stage along with electric restrictions. Users can select quantity of test points and the sizes of their contact pads, to define prohibition zones for placement of test points and to create reports for check of degree of readiness of a payment for testing. Allegro PCB Editor includes special function of control of the rules DfA in real time. With its help it is possible to control and to visually monitor any violations connected with gaps between components on a payment. At rapprochement of components on distance maximum allowed the rules DfA the program will automatically issue warning and "will stop" the user before possible abuse of regulations.

Data transmission on production

Allegro PCB Designer can generate a full range of files for production and testing of the printed circuit board, including the Gerber 274x, NC Drill, NC Route etc. But what is especially important, Cadence supports an industrial trend of transition to the "bezgerberny" production technology using new universal IPC-2581 format. The feature of this format is that all data necessary for production, assembly, drilling, milling and testing of a payment to be stored in one unified file. Users can select data for IPC-2581 file for the purpose of protection of the intellectual property. Import of IPC-2581 to Allegro PCB Editor allows to browse the file.

Miniaturization

The route of design of HDI managed by restrictions

When using the BGA body with a width of outputs of 1.0-0.8 mm and less up to 0.5 mm users should apply technology of installation with a high density of connections (high-density interconnect, HDI). Though miniaturization is also not a main goal for many segments of the market, use of BGA requires transition of building is inevitable at trace of the difficult BGA body with three and more rows of outputs from each party.

Allegro PCB Design together with an option of miniaturization (Miniaturization Option) provides an end-to-end route of design with control of a full range of rules and restrictions for different HDI styles of projects – from hybrid building / combination to ALIVH which are completely based on building processes, for example.

Besides, Allegro PCB Editor includes automatic means on use of HDI technology in about - ekta for reduction of time for development and consecutive improvement of construction (an iterative design method) (fig. 7).

Fig. 7 – Dynamic interface of contact pads and conductors at interactive trace considerably saves time on a project definition phase to production

Support of technology of the built-in components

Reduction of the sizes of an end product can be reached in the different ways. One of them consists in placement of case elements on inside layers of a payment. Allegro PCB Designer in the presence of an option of miniaturization offers technology of the trace managed by restrictions for the built-in components.

It supports as traditional technologies of direct and indirect accession, and the newest technologies of bilateral connection for one component, vertical arrangement of a component, the built-in components for the two-sided board. The option of miniaturization allows the user to create deepenings and to manage them on the layers selected under placement of the built-in components.

Creation of analog HFs and very high frequency of payments

Packet of Allegro PCB Designer together with an option of design of analog radio-frequency chains Analog/RF Designpredstavlyaet the development environment for the mixed signals from creation of the scheme before planning with history logging of changes allowing to increase performance of design process of radio-frequency products to 50%. This option allows engineers to create, integrate and finish analog radio-frequency and microstrip circuits together with digital and analog circuits in the environment of Allegro PCB Designer. Having the developed possibilities of planning and powerful interfaces with means of computational modeling in the radio-frequency range, this option allows engineers to begin design process of radio-frequency schemes from Allegro Design Authoring, Allegro PCB Designer or Agilent ADS.

Parallel collective development

For reduction of cycle duration of development geographically spaced groups of developers will even more often be organized. The procedures of manual check and operational development which are traditionally applied at collective development are very slow, expensive on time and are connected with risk of introduction of errors.

The Allegro PCB Design Partitioning technology implements multi-user parallel methodology of development for acceleration of process and reduction of time of planning. A great number of developers can work with its help at the same time, having access to the general database irrespective of remoteness. Developers can separate design process into a number of tasks or areas for which planning and editing will be made and to charge them to several members of collective. Developments can be separated vertically (sections) with programmatically the set borders or horizontally (layers). As a result each developer can see all separate sections and to see process of creation of construction and results of other designers. The possibility of such separation helps to reduce considerably duration of development cycles and to accelerate design process.

Technology of automatic routing of printed circuit boards

The optimization appliance for production (DFM, Design For Manufacturing) entering in the tracer of Allegro PCB Router considerably reduces number afterwards of the rejected products. Its algorithms provide a possibility of automatic diversity of conductors using all available empty seat. Automatic diversity of conductors helps to increase technological effectiveness by movement of conductors for additional increase in gaps between conductors and outputs, between conductors and contact SMD platforms and releases of an occasional seat for the carrying-out polygons. Users use advantages of flexibility of a task of admissions manually or by default.

During trace free corners and control points can be set. Algorithms of DFM automatically do optimal indents, since the greatest and reducing them in available limits. The tool for control points automatically inserts test transitional openings or contact pads on a payment. Control points in the form of test transitional openings can be located both on a lobby, and on a reverse side of a payment that allows to use one-sided or bilateral testers. Developers have a possibility of the choice of methodology of the insert of control points conforming to their production requirements. Control points can be fixed in order to avoid need of modification of the test equipment. The limiting conditions for control points include a form of a surface of test probes, the sizes of transitional openings, grids and the minimum distances of openings between centers.

The automatic routing managed by restrictions for high-speed payments

The high-speed limiting conditions and algorithms of trace use differential pairs, network planning, temporary parameters of signals, level of crosstalk, trace of set of layers and the special requirements to geometry imposed to modern high-speed chains. Algorithms of automatic routing accurately execute trace using transitional openings and near them and also automatically maintain compliance to the set temporary or space criteria. Automatic network planning is applied to reduction of noise level in the networks sensitive to noise. It is possible to apply separate rules of design to different areas, for example, it is possible to set the rule of the most dense placement of conductors and less strict rules on the rest of a payment.

Supported operating systems

• Sun Solaris
• Linux
• IBM AIX
• Windows

2013: quarter accumulative release 3

Cadence Design Systems Inc. announced on August 29, 2013 release of quarter updating for the Allegro software package.

Additions in release

• the full-function feature to load 3D models of components and mechanical parts in the STEP format for visual control of gaps is added. The STEP model can be added directly in the editor of characters or the editor of topology. The special variable of steppath specifies a way to STEP libraries of models on a local disk of the user or the server. The ready topology can be exported in the STEP format to a mechanical CAD now. At the same time different options of export for control of the size of the general STEP model of a payment are supported;

• the new technology of autointeractive trace Auto-Interactive Breakout (AiBT) is added. Its essence is that the program depending on actions of the user automatically creates conductors on both ends of the bus or the interface. At the same time lines of chains on a payment should be united in the general sheaf. At trace the mode when the user on one screen can see both ends of a sheaf at the same time is supported;

• the new instrument of trace Auto-Interactive Add Connect (AiCC) is added. This command works in two modes – manual and automatic. The manual mode differs in nothing from the standard Add Connect command. At start of the automatic mode the user draws a curved line on route of laying of the route in the beginning, and then this curve will be transformed to the ready route;

• the new Detune command allows to delete result of fine tuning of the single route or several routes longwise. This function is very convenient if it is necessary to transfer routes or to change restrictions on delays.