MentorGraphics Expedition PCB

Expedition all main formats of technology files for production of printed circuit boards are supported, namely: Gerber, ATE, AIS Drill and others. the supplementing capabilities in respect of adaptation to requirements of the specific equipment and also the general automation of release of technology files are provided by the module CAM Output Manager.

Expedition route core – a set of Expedition PCB around which design-time environment – from simulars at the system level before verification taking into account results of trace and features of production forms. Expedition PCB within a uniform cover of the user provides access to the powerful interactive editor of topology and the configured multipass autotracer based on a unified environment of design of topology of AutoActive.

Excellent integration reduces time of completion of the project and excludes clock errors

The uniform integrated environment of placement and trace of AutoActive technology reduces the general design time and increases productivity

The general database, user interface and rules stimulate performance

Design with observance of rules yields high-quality results.

Expedition PCB solves important problems of design, including trace of differential pairs, adjustment of chains, optimization of production and technology of microtransitions and build-up

Main features of Expedition PCB:

• instant switching from the automatic mode in manual and back;
• automatic control of geometrical rules for simple and high-frequency routes;
• diagonal trace (in the directions, multiple 45 °) taking into account real geometrical forms of many objects on a payment (shape based);
• automatic smoothing of routes for reduction of number of segments and elimination of acute angles;
• automatic expansion of the routes and interlayer transitions interfering carrying out the route at full save of connectivity of trace;
• dynamic filling (flooding) of areas (observance of gaps around routes, interlayer transitions and contact pads is automatically controlled that gives capability to leave the filling mode included at accomplishment of interactive and automatic routing);
• support of determination of local rules of design in areas of any form and for separate layers that is especially relevant at trace in the field of placement of multilead packages of a type of BGA;
• trace of buses (including at an angle 45 °) which part differential pairs will be able to be;
• dynamic control and indication of the design abuses of regulations arising at trace;
• possibility of modification of rules with retrace in real time;
• for high-speed routes – a possibility of a task of rules (an impedance, propagation delay, length) both for a separate chain, and for group of the interconnections forming a signal propagation path;
• dynamic correction of high-speed routes in the manual and automatic mode, necessary for automatic "reconfiguration" of routes in case of an exit of any parameter for borders of the set range;
• the tracers of differential pairs (both on one, and in the next layers) providing joint carrying out and modification of routes taking into account rules of parallelism and the set distance between routes.
• use of interlayer microtransitions, including a possibility of placement of microtransition in a contact pad.

In final versions of a packet of Expedition PCB there were supplementing means of performance improvement of work. First of all it is about support of collective design and a repeated yuzaniye of the solutions fulfilled on the previous projects. The module Team Design gives capability at the same time to work over trace of a difficult payment at once in several design centers. At the same time there is no need to change infrastructure of the database of the project and libraries of components. The module Design Reuse gives capability to save in the central library the complete information about the designed subsystem (a fragment or all payment), including a schematic circuit, placement and trace it could be used (entirely or in the modified type) in future projects.