XuanTie 910 (processor)

2020: The announcement of the updated 16-core processor for data centers

At the end of August, 2020 Chinese provided to Alibaba the updated 16-core processor on an open architecture of RISC-V which, as expected, can compete with Intel in the equipment for data centers and communication networks of fifth generation.

At the time of the announcement it is the most powerful chip based on RISC-V. He received the name Xuantie 910 or, in abbreviated form, XT 910.

XT 910 is executed on 12-nanometer technology, is 64-bit and supports clock rate from 2 to 2.5 GHz. He is able to execute commands with change of a priority and has the 12-staged pipeline capable to execute 8 transactions of selection and 3 transactions of decoding for a cycle.

Depending on model, each core can be equipped a cache memory of the first level 64 or 128 of CB. Also there is a cache of the second level with a capacity up to 8 MB distributed between all cores.

Provided to Alibaba the 16-core processor for data centers which will compete with Int

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In addition to the RISC-V commands, the chip supports the proprietary RISC-V Turbo set which contains commands for bit transactions, a memory access, synchronization of cores, memory management and work with the buffer. According to engineers, in certain cases expansion is capable of 20% to increase high-speed performance in comparison with standard set.

Alibaba is going to publish the description and schemes of computing cores, however for full access to technical documentation for production of chips it will be commercially necessary to purchase the license at the company.

RISC-V is a version of architecture of RISC created for free development and distribution. The consortium RISC-V International which includes Alibaba, Huawei, Google, ZTE, Western Digital, Nvidia, Mediatek, Qualcomm and other companies — only more than 200 organizations is engaged in support of the standard.

The architecture is of a certain value as allows to be hit legally in the hands the western technologies for China, to be engaged in their development and improvement and also commercial implementation irrespective of other countries and possible economic sanctions.^[1]

2019: Announcement

On July 25, 2019 provided to Alibaba the first microprocessor — XuanTie 910. It is developed based on an open architecture  of RISC-V which is used by many other Chinese chipmakers.

The RISC-V technology has several advantages when using in the smartwatch and other electronics with Internet connection. Besides, it is considered unattainable for the American sanctions and can be used in China without fear to break export restrictions, notes the Nikkei edition.

Provided to Alibaba the first processor

Most the Chinese companies are still afraid of whether there will be an architecture of ARM and also architecture and technical support of Intel in the conditions of technical strength and further geopolitical uncertainty — the analyst of CINNO research company Sean Yang argues. — For China it would be very useful to become more self-sufficient in the semiconductor industry and if the large companies, such as Alibaba, began to create the processor platform which small Chinese developers could use without problems, without worrying that they will be cut off from deliveries.

Alibaba addresses the chip to the Chinese companies creating "smart" columns, systems for unmanned vehicles, a 5G - and solution AI and also other network equipment which needs high performance.

Certainly, the company does not intend to make independently this processor as considerable investments and experience for this purpose are required. Alibaba will use services of semiconductor producers, and the Semiconductor Manufacturing International company is considered one of applicants for cooperation with Internet giant.

XuanTie 910 is created in semiconductor division of Pingtouge which was created by Alibaba in September, 2018.

On July 25, 2019 promised to release the processor on the commercial market "in the nearest future". Besides, a part of the source code of this chip will be laid out in free access.^[2]

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