DRAM

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Global DRAM Market

The DRAM memory market in 2008  decreased by 19.8 % to $25.2  billion compared to $31.5  billion in 2007 . This was due to falling prices, purchasing.com reports citing a iSuppli study. Read DRAM-Memory Article (Global Market)

Structure

The main feature of DRAM is dynamic data storage. This makes it possible to repeatedly write information to RAM, but at the same time there is a need to constantly update the data. In fact, overwriting occurs every 15 μs. There is also a static random access memory (S-RAM) that does not require continuous data updates. And one and the other view functions only when the computer is turned on. RAM is a physical chipset that connects to the motherboard. Since the characteristics of these chips are very different, they must be compatible with the system for normal operation.

Currently, three types of storage devices are used: ROM (read only memory), DRAM (Dynamic Random Access Memory), S-RAM (Static RAM).

Currently, DRAM is used in most modern computers. The main advantage of this type of memory is the extremely tight packing of cells, which allows you to create large-capacity memory, while the device itself takes up very little space. Each cell is a micro capacitor that holds charges (presence or absence of charges and information bits are encoded). The main problem of such memory is the need to constantly regenerate the charge otherwise the capacitor will "stack," which will lead to data loss. The update of which and, therefore, preservation is the responsibility of the built-in controller with a regeneration frequency of 15 μs. In modern ultra-high frequency computers, the regeneration process takes up to 1 % of the processor time. Therefore, it makes no sense to increase the time between cycles  - this will not significantly affect the operation of the processor, and in addition can be applied to the discharge of the capacitor and, as a result, to the loss of data.

DRAM Features

The memory structure resembles a table where you first select a row and then a column. This table is broken down into banks. Memory density less than 64 Mbit (SDRAM) has 2 banks, higher  - 4. In particular, DDR2 SDRAM provides a 4-bit presampling system. DDR2 works at a voltage of 1.8 V. By the way, the first DDRs worked at a voltage of 2.6 V. Recently, the DDR3 standard, which has an 8-bit sampling system and operates at a voltage of 1.5 V. At the same time, provides the same throughput at half the clock frequency. It takes more time to open a row in the bank in use than in another (since the row in use needs to be closed first). Obviously, it is better to open a new row in a new bank (the principle of alternating rows is based on this). The popularity of DRAM is explained by its relative cheapness and extremely tight packaging of chip cells, which allows a small device to have a very large capacity. Disadvantages include low speed, which is much slower than processors. To circumvent this disadvantage, there are several types of DRAM organization.

Timings

Usually on a memory chip or in the documentation for it there is an inscription of four digits of the form 3-4-4-8 or 5-5-5-15. This is an abbreviated record of the main memory timings. Timing  is a delay that sets the time required to execute a command, that is, the time from sending a command to executing it. And each digit indicates exactly what time is needed. The timing scheme includes CL-Trcd-Trp-Tras delays. To work with memory, you need to first select the chip with which we will work. This is done with the command CS# (Chip Select). The bank and row are then selected. You must activate any row before you can work with it. This is done by the row selection command RAS# (it is activated when the row is selected). You then select the column with the CAS# command, which initiates the read. Then read the data and close the line by performing a pre-charge (precharge) of the bank.

Samsung So-DIMM

Memory Types

Extended EDO Data Out takes into account the overlap in synchronization between the next access operations. This allows you to combine the next cycle with the previous one and save 10 ns. in each cycle. The next step in DRAM acceleration was memory (Burst EDO Burst Extended-Data-Out Dynamic Random Access Memory). This is essentially the same EDO, but with even faster data transfer. Today, this type of memory is not produced because it has been completely supplanted by the new SDRAM format. (SDRAM Synchronous DRAM) transmits information in high-speed packets using a high-speed synchronized interface. This type of DRAM synchronizes with the memory bus, avoiding many waiting cycles. An even more advanced standard of RAM is (DDR Double Data Rate -  double data rate). Speed doubling occurs due to the fact that in one cycle the data is transmitted twice -  at the beginning and end of the cycle. A fundamentally new type of RAM (RDRAM Rambus DRAM) is used in high-performance personal computers. There are two- and four-channel RDRAMs that allow you to increase the data rate to 3.2 and 6.4 GB\sec, respectively. The RDRAM memory controller allows you to install up to three RIMM modules. Over time, it is planned to produce RIMM modules with a volume of 1 GB (now 256 MB) with a large number of connectors. And RIMM for laptops, a portable version (SO-RIMM Small Outline RIMM) is offered.

SIMM

Initially random access memory represented chips with two-row location of conclusions (Dual Inline Package  DIP -). Motherboards contained up to 36 connectors for connecting these chips. To facilitate the connection process, they began to be mounted on separate boards that were connected to the bus connectors. There are two similar memory modules. SIMM (Single Inline Memory Module), with single-row location of conclusions and DIMM (Dual Inline Memory Module) with two-row location of conclusions or, as an alternative to separate chips of memory, the RIMM modules. They are connected to the connectors of motherboards or expansion boards. There are two main types of SIMM modules: 30-pin (8 bits plus 1 additional parity bit) and 72-pin (32 bits plus 4 additional parity bits).

DIMM

DIMMs typically contain standard SDRAM or DDR SDRAM chips and differ in physical characteristics. The standard DIMM has 168 pins, one radial slot on each side, and two slots in the contact area. The DDR DIMMs have 184 outputs, two slots on each side, and one slot in the contact area. The path width of DIMMs is 64 bits (without parity) or 72 bits (with parity or ECC support). There are different signal leads on each side of the DIMM board. That is why they are called memory modules with a two-row arrangement of pins. The RIMM memory module is also double-sided. To date, there is only one 184-pin module having one radial slot on each side and two slots located in the central part of the contact area. Dynamic memory chips (DRAM) installed in different types of modules (SIMM, DIMM or RIMM) have different characteristics. SIMM performance varies from 50 to 120 ns at 66, 100, and 133 MHz. DDR DIMMs are 1600 and 2100 MB/s. ROM is inserted into DIMMs and RIMMs to transmit timing and speed parameters. Because of this, the operating frequency of the memory controller and memory bus in most systems corresponds to the lowest frequency of the installed modules. DIMMs and DDR DIMMs use SDRAM chips. In DIMMs, data is transmitted in the form of high-speed packets, and in DDR twice in one cycle. SDRAM memory chips support bus speeds up to 133 MHz, while DR DIMMs  support up to 266 MHz. DIMMs are also distinguished by the presence or absence of a buffer and different power voltages. For normal operation of the entire system, these characteristics must be taken into account when replacing parts.

Parity and ECC

GDDR graphics memory is the next step in the development of high-speed DDR SDRAM technologies. This type of RAM allows you to control complex geometry and animation at the level of modern dynamic films. To correct memory errors, two methods are used: parity control and error correction codes (ECC) . Parity control is the standard by which information should be stored in fragments of 9 bits. 8 bits or 1 byte are for the information itself, and one for parity control. It is with its help that the integrity of the data is controlled. If an error is detected, a message appears or the computer is locked. Error Correcting  Code (ECC) is a more effective solution that not only detects an error, but also corrects it in one bit, and some systems correct errors even in two bits. In error correction codes, for each 32 bits, an additional seven check bits are required at 4-byte  and eight at 8-byte organization.

Although DRAM technology has long been the most popular type of RAM, experts predict its imminent demise. The main reason is the inability to infinitely reduce the size of the cell. Among the most likely successors of DRAM are called "floating body memory" (FBM), the main feature of which is the absence of a capacitor in the memory cell.

See also

ROM

S-RAM

GDDR