CPU

Modern processors, made in the form of separate chips (chips), implementing all the features inherent in this kind of devices, are called microprocessors. Since the mid-1980s, the latter have practically supplanted other types of CPU, as a result of which the term has become more and more often perceived as an ordinary synonym for the word "microprocessor." However, this is not the case: the central processing devices of some supercomputers even today are complex complexes of large (BIS) and super-large (CBIS) integrated circuits.

Initially, the term Central Processor Device described a specialized class of logical machines designed to execute complex computer programs. Due to the rather accurate correspondence of this assignment to the functions of the computer processors that existed at that time, it was naturally transferred to the computers themselves. The beginning of the use of the term and its abbreviation in relation to computer systems was laid in the 60s of the XX century. Since then, the device, architecture and implementation of processors have changed many times, but their main executable functions have remained the same as before.

Early CPUs were created in the form of unique components for unique, and even unique, computer systems. Later, from an expensive method of developing processors designed to run one or more highly specialized programs, computer manufacturers moved to mass-production of typical classes of multi-purpose processor devices. The trend towards standardization of computer components originated in the era of the rapid development of semiconductor elements, mainframe and minicomputers, and with the advent of integrated circuits it became even more popular. The creation of microcircuits allowed to further increase the complexity of the CPU while reducing their physical size. The standardization and miniaturization of processors led to the deep penetration of digital devices based on them into the daily life of a person. Modern processors can be found not only in high-tech devices such as computers, but also in cars, calculators, mobile phones and even in children's toys. Most often they are represented by microcontrollers, where in addition to the computing device on the chip there are additional components (interfaces, I/O ports, timers, etc.). The modern computing capabilities of the microcontroller are comparable to processors of personal computers a decade ago, and more often even significantly exceed their performance.

Von Neumann Architecture

Шаблон:Main 'Von Neumann Architecture Most modern processors for personal computers are generally based on one version or another of the cyclic sequential information processing process invented by John von Neumann.

D. von Neumann came up with a scheme for building a computer in 1946.

The most important steps in this process are described below. Different architectures and commands may require additional steps. For example, arithmetic instructions may require additional memory accesses during which operands are read and results written. A distinctive feature of von Neumann architecture is that instructions and data are stored in the same memory.

Execution cycle steps:

1. The processor sets the number stored in the instruction recorder to the address bus, and gives the memory a read command;
2. The billed number is the address for the memory; memory, having received an address and a reading command, puts content stored at that address on a data bus, and reports readiness;
3. The processor receives the number from the data bus, interprets it as a command (machine instruction) from its command system and executes it;
4. If the last instruction is not a transition instruction, the processor increments by one (assuming that the length of each instruction is one) the number stored in the instruction counter; as a result, the address of the next command is formed there;
5. Perform step 1 again.

This cycle is always executed, and it is called a process (where the device name came from).

During the process, the processor reads and executes a sequence of instructions contained in the memory. This sequence of instructions is called a program and represents an algorithm for the useful operation of the processor. The sequence of reading instructions changes if the processor reads the transition command - then the address of the next command may be different. Another example of a process change is if you receive a stop command or switch to hardware interrupt processing mode.

CPU instructions are the lowest level of computer control, so execution of each instruction is inevitable and unconditional. There is no verification of the validity of the actions performed, in particular, the possible loss of valuable data is not checked. For a computer to perform only valid actions, the commands must be properly organized as a required program.

The rate of transition from one cycle stage to another is determined by the clock. The clock generator generates pulses that serve as a rhythm for the central processor. The clock frequency is called the clock frequency.

Pipeline Architecture

Pipeline architecture (pipelining) was introduced into the CPU in order to improve performance. Typically, a number of operations of the same type are required to execute each command, for example: fetching the command from, RAM decrypting the command, addressing the operand in RAM, fetching the operand from RAM, executing the command, writing the result in RAM. Each of these operations is compared to one stage of the conveyor. For example, an architecture microprocessor pipeline MIPS-I comprises four steps:

• Receive and decode an instruction (Fetch)
• addressing and fetching the operand from Memory access
• Arithmetic Operation
• Save Transaction Result (Store)

After releasing <math>the k-th</math> stage of the conveyor, she immediately begins work on the next command. Assuming that each stage of the pipeline spends a unit of time on its work, then executing a command on a n-stage pipeline <math></math>will take <math>n</math> units of time, but in the most optimistic case, the result of executing each next command will be obtained in each unit of time.

Indeed, if there is no pipeline, the execution of the command will take <math>n</math> units of time (since it is still necessary to fetch, decrypt, etc.), and it will take <math>n\cdot m</math> units of time to execute <math>m</math> commands; when using the pipeline (in the most optimistic case), it will take only <math>n +</math> m units of time to execute <math>m</math> commands.

Factors that reduce conveyor efficiency:

1. a simple pipeline where some steps are not used (e.g., addressing and fetching the operand from RAM is not needed if the command works with registers);
2. Wait: If the next command uses the result of the previous command, then the last command cannot begin to execute before the first one is executed (this is overcome when using out-of-order execution).
3. clears the pipeline when it receives a transition command (this problem can be smoothed out using transition prediction).

Some modern processors have more than 30 stages in the pipeline, which increases processor performance, but leads to long downtime (for example, in the event of an error in predicting a conditional transition.)

Superscalar architecture

Ability to execute multiple machine instructions in a single processor cycle. The advent of this technology has led to a significant increase in performance.

CISC processors

Complex Instruction Set Computing - compute with a complex set of commands. Processor architecture based on a complicated instruction set. Typical representatives of CISC are the Intel x86 microprocessor family (although for many years these processors are CISC only on an external instruction system).

RISC processors

Reduced Instruction Set Computing (technology) - calculations with an abbreviated set of commands. Processor architecture based on an abbreviated instruction set. It is characterized by the presence of instructions of a fixed length, a large number of registers, operations of the register-register type, as well as the absence of indirect addressing. The concept of RISC was developed by John Cocke of IBM Research, the name was coined by David Patterson.

The most common implementation of this architecture is represented by processors of the PowerPC series, including G3, G4 and G5. A fairly famous implementation of this architecture is the MIPS and Alpha series processors.

MISC processors

Minimum Instruction Set Computing - calculations with a minimum set of commands. The further development of the ideas of the team of Chuck Moore, who believes that the principle of simplicity, which was original for RISC processors, fell into the background too quickly. In the heat of the struggle for maximum speed, RISC caught up and overtook many CISC processors in complexity. The MISC architecture is based on a stack computing model with a limited number of instructions (approximately 20-30 instructions).

Multi-core processors

Contain multiple processor cores in the same package (on one or more crystals).

Processors designed to run a single copy of the operating system on multiple cores are a highly integrated implementation of the Multiprocessor system.

Currently, two-core processors are massively available, in particular the Intel Core 2 Duo on the Conroe core and the Athlon64X2 based on the K8 microarchitecture. In November 2006, the first quad-core Intel Core 2 Quad processor was released on the Kentsfield core, which is an assembly of two Conroe crystals in one package.

September 10 2007 years were released for sale native (in the form of one crystal) four-core processors for servers, which in the AMD Quad-Core Opteron process of development had the code name AMD Opteron Barcelona. November 19 2007 a four-core processor for home computers went on sale. AMD Quad-Core Phenom These processors implement the new K8L (K10) microarchitecture.

September 27 2006 Intel demonstrated a prototype 80-core processor of the year. It is assumed that mass production of such processors will become possible no earlier than the transition to a 32-nm process, and this in turn is expected 2010 by the year.

Caching

Caching is the use of additional fast memory (cache) to store copies of blocks of information from main (RAM) memory, which are likely to be accessed in the near future.

Distinguish between 1-, 2-, and 3rd-level caches. The L1 cache has the lowest latency (access time), but is small in size, in addition, L1 caches are often made multi-port. So, AMD K8 processors were able to produce 64 bits of write + 64 bits of read or two 64-bits of read per clock, Intel Core processors can produce 128 bits of write + 128 bits of read per clock. The L2 cache typically has significantly greater access latencies, but can be made much larger in size. Level 3 cache is the largest in volume and rather slow, but still it is much faster than RAM.

Parallel architecture

Von Neumann's architecture has the disadvantage that it is consistent. No matter how large an array of data is required to be processed, each byte will have to pass through the CPU, even if all bytes require the same operation. This effect is called the narrow neck of von Neumann.

To overcome this disadvantage, processor architectures called parallel have been proposed and proposed. Parallel processors are used in supercomputers.

Possible options for parallel architecture can be (according to the Flynn classification):

• SISD - one command stream, one data stream;
• SIMD - one command stream, many data streams;
• MISD - many command streams, one data stream;
• MIMD is a lot of command streams, a lot of data streams.

Processor Manufacturing Technology

Processor Development History

The first public microprocessor was the 4-bit Intel 4004. It was replaced by the 8-bit Intel 8080 and 16-bit 8086, which laid the foundation for the architecture of all modern desktop processors. But due to the prevalence of 8-bit memory modules, 8088 was released, clone 8086 with an 8-bit memory bus. Then it was modified 80186. The 80286 processor has a 24-bit protected mode that allows you to use up to 16 MB of memory. The Intel 80386 processor appeared in 1985 and brought improved protected mode, 32-bit addressing, which allowed you to use up to 4 GB of RAM and support for the virtual memory mechanism. This line of processors is based on a register computing model. In parallel, microprocessors are developing, taking as the basis a stack computing model.

Modern manufacturing technology

File:AMD Athlon XP2000 Plus CPU.jpg In modern computers, processors are made in the form of a compact module (about 5 × 5 ×  0, 3cm) inserted into a zif socket. Most modern processors are implemented in the form of a single semiconductor crystal containing millions, and recently even billions of transistors. In the first computers, processors were bulky units, sometimes occupying entire cabinets and even rooms, and were made on a large number of individual components.

In the early 70s of the twentieth century, thanks to a breakthrough in the technology of creating LSI and CBIS (large and super-large integrated circuits), microcircuits, it became possible to place all the necessary CPU components in one semiconductor device. So-called microprocessors appeared. Now words the microprocessor and the processor practically became synonyms, but then it was not so because ordinary (big) and microprocessor COMPUTERS peacefully coexisted still at least 10-15 years, and only in the early eighties microprocessors forced out the senior fellows. I must say that the transition to microprocessors later made it possible to create personal computers, which now penetrated almost every house. The first microprocessor Intel 4004 was introduced November 15 1971 by Intel. It contained 2300 transistors, worked at a clock frequency of 108 kHz and cost $300.

Over the years, microprocessor technology has developed many different architectures. Many of them (in an supplemented and improved form) are still used today. For example, Intel x86, which developed first in 32 bits of IA32 and later in 64 bits of x86-64. X86 processors were initially used only in IBM personal computers (IBM PC), but are now increasingly used in all areas of the computer industry, from supercomputers to embedded solutions. You can also list such architectures as Alpha, Power, SPARC, PA-RISC, MIPS ( RISC - architectures) and IA-64 (EPIC - architecture). Most processors currently in use are Intel-compatible, that  is, they have a set of instructions , etc., like Intel processors.

The most popular processors today are produced by Intel, AMD and IBM. Among processors from Intel: 8086, i286 (in the Russian computer slang "two", "two-room flat" is called), i386 ("three", "three"), i486 ("four"), Pentium (i586) ("stub", "stump", "the second stub", "the third stub", etc. There is also a return of names: Pentium III is called the "triple," Pentium 4 is called the "four"), Pentium II, Pentium III, Celeron (simplified version of Pentium), Pentium 4, Core 2 Duo, Xeon (processor series for servers), Itanium, etc. AMD has in its line of processors Amx86 (comparable to Intel 486), Duron, Sempron (comparable to Intel Celeron), Athlon, Athlon 64, Athlon 64 X2, Opteron, etc.

Future prospects

In the next 10-20 years, most likely, the material part of the processors will change due to the fact that the technological process will reach the physical limits of production. Perhaps it will be:

1. Quantum computers.
2. Molecular computers.

Quantum Processors

Processors whose work is entirely based on quantum effects. Currently, work is underway on the creation of working versions of quantum processors.

Russian microprocessors

The development of microprocessors in Russia is carried out by ICST CJSC. He developed and put into production universal RISC microprocessors with design standards of 130 and 350 nm. The development of a new generation superscalar processor Elbrus has been completed. The main consumers of Russian microprocessors are MIC enterprises.

History of development

• 1998. SPARC-compatible microprocessor with technological standards of 500 nm and frequency of 80 MHz
• 2001 SPARC-compatible microprocessor MCST-R150 with topological norms of 350 nm and clock frequency of 150 MHz.
• 2003 SPARC-compatible microprocessor MCST-R500 with topological norms of 130 nm and clock frequency of 500 MHz.
• 2004. E2K - a new generation microprocessor with fully custom technology with topological norms of 130 nm and clock frequency of 300 MHz (copyrights are protected by 70 patents).
• 2005.
  • January
  • * State tests of the MCST-R500 microprocessor, the most advanced modification of the first modern domestic universal RISC microprocessors of the @ MCST-R. family, have been successfully completed. This microprocessor was the basis for five new modifications of the Elbrus-90micro computing complex, which successfully passed standard tests at the end of 2004.
  • * On the basis of the MTSST-R500 microprocessors, within the framework of the Elbrus-90mikro project, a microprocessor module MV/C was created, which is actually a single-board computer.
  • * On the basis of the MCST-R500 microprocessor core, the development of a dual-processor system on a chip (SNK) has begun. All controllers that ensure its functioning as an independent computer will also be located on the chip. On the basis of SNK, it is planned to create families of new small-sized wearable computing devices such as laptops, handsets, GPS binders, etc.
  • May
  • * First microprocessor samples received Elbrus. This microprocessor is built on the unparalleled advanced domestic technology, in which it is implemented explicit concurrency architecture (VLIW EPIC /). CJSC "MCST" begins to test the microprocessor.

Neuromorphic Processors

Main article: Neuromorphic processors

Other national projects

China

• Loongson